It is often desirable to solder coat leads on molded semiconductor devices, such as dual in-line packages, in order to facilitate soldering of the leads to printed circuit boards and the like. Such solder coating normally takes place after encapsulation of the device, but before the device has been separated or singulated from the lead frame strip, and has been accomplished by hanging a plurality of individual -ead frame strips on hooks on a common plating rack. The plating rack is then immersed in a plating bath. By applying a plating current through the rack, all of the lead frame strips hanging from the rack would be solder coated simultaneously.
Although the above-described method provides adequate solder plating on the individual devices, the method is time consuming and requires a substantial labor input to individually hang and remove the lead frame strips, which is very costly on a per unit basis. Moreover, the plating racks frequently are unable to evenly distribute the plating current, resulting in uneven plating thicknesses among the individual lead frames.
It would therefore be desirable to develop new methods and systems for solder plating lead frame strips for molded devices which would be less time consuming and would require less labor input. In particular, it would be desirable to provide a system for plating a plurality of individual lead frames, which system would not require that the lead frames be manually removed from the lead frame carrier prior to plating, and which would assure even plating among the various lead frames being plated.